Today’s chip producers face strict necessities with regards to high quality assurance as extra complicated chips energy more and more refined, greater performing, and costlier high-tech gadgets. The reliability and integrity of those gadgets – enterprise playing cards for his or her respective OEM manufacturers – will depend on the integrity of each single chip inside them, from single-die packages to extra complicated, built-in multi-chip packages.
“Chip manufacturers can meet these challenges with advanced process control technologies, and KLA’s innovations and investments in zero-tolerance defect inspection help raise the bar for continued gains in chip integrity, production throughput and yield. Reducing the material losses associated with defective chips also allows chip manufacturers to make better use of limited material supplies while reducing waste, in the long run.”
Pieter Vandewalle, common supervisor, division ICOS, KLA
Overkill And Underkill Optimization
Zero tolerance means greater than guaranteeing that faulty chips don’t negatively impression buyer product strains. Chip producers additionally must grapple with instances the place good chips are mistakenly thought-about faulty and brought out of manufacturing (overkill), or the choice the place a killer defect is missed and the chip is allowed to maneuver on to the following manufacturing step (underkill). In each instances, the related price penalties and materials waste can rapidly add up. To obtain a cautious, constant, cost-effective steadiness between overkill and underkill—with out compromising excessive velocity—chip producers are looking for the newest improvements in mould sorting and inspection.
KLA’s new ICOS™ F260 system responds to this pattern, delivering inspection and workflow enhancements on a platform that has been redesigned from the bottom as much as present industry-leading accuracy and better general throughput to assist large-scale manufacturing. The ICOS F260 affords the totally automated potential to detect each inner and superficial chip defects with extraordinarily low overkill and underkill charges to assist optimize yield.
Unique Inspection Capabilities
The ICOS F260 is designed to grade and examine diced bare-die and superior wafer-level packages (WLP) at excessive speeds of as much as 40,000 models per hour (UPH). The new techniques are optimized to detect hairline (sub-micron) sidewall cracks and chipped die edges brought about throughout mechanical noticed blade chopping and hybrid mechanical laser chopping – and it achieves this with the very best accuracy accessible within the {industry} right now.
These hairline anomalies are sometimes so small that they can’t be successfully detected utilizing electrical testing strategies. Instead, chip producers are turning to automated mould sorting and inspection techniques such because the ICOS™ F260 for fast detection of those yield-limiting issues.
The ICOS F260 is exclusive in its potential to make use of brief wave infrared (IR) mild at excessive throughputs for inspection of sidewalls and laser groove areas. Because silicon is clear to shortwave IR, extra photons can move by the gadget, that are captured and processed by a sensor on the opposite aspect to ship correct, edge-to-edge defect detection. Systems utilizing near-infrared (NIR) wavelengths present a restricted, shallow depth of view into the gadget, as transmissions are largely absorbed within the silicon.
The ICOS F260’s enhanced Laser Groove Crack Inspection (LGC) utilizing shortwave IR together with a modified optical path gives extra correct visualization of slender chip edges which can be vulnerable to heat-related cracks and defects attributable to laser grooving processes. Finally, utilizing specialised cameras working within the visible wavelength to examine the highest and backside of the gadget, the ICOS F260 provides operators a full six-sided view of the mould with unparalleled decision and precision.
Improved Workflow Versatility
In addition to the increase in throughput, the ICOS F260 mould sorting and inspection techniques enhance complete price of possession in different methods, by supporting quite a lot of enter and output media, together with wafer, tape, and chip tray. Changeover occasions for numerous die geometries are decreased to an hour or much less, and these supported gadget geometries can vary from 0.5 × 0.5 mm to 10 × 10 mm (12 × 12 mm optionally available) configurations or customized type elements.
For extremely correct defect detection and quick throughput, KLA’s ICOS sorting and inspection techniques set a brand new benchmark for chip producers trying to optimize yield and reduce materials waste. In addition, the ICOS F260 system provides chip producers – and their prospects – confidence that chip defects is not going to go undetected and later manifest themselves as expensive gadget recollects (and branding errors). Electronic gadget OEMs can keep the chip-level integrity they want as package deal complexity will increase, with out compromising high quality inspection and velocity.
See the mould sorting and inspection web page for extra data on the ICOS F260 system, or go to KLA’s packaging portfolio web page to study extra about our portfolio of packaging course of management and course of assist options for wafers, packaged parts and IC substrates.
Source: www.kla.com